- 专利标题： Control gate word line driver circuit for multigate memory
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申请号： EP13188548.5申请日： 2013-10-14
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公开(公告)号： EP2728582B1公开(公告)日： 2018-06-20
- 发明人: MULLER, Gilles J. , SYZDEK, Ronald J.
- 申请人： NXP USA, Inc.
- 申请人地址： 6501 William Cannon Drive West Austin TX 78735 US
- 专利权人： NXP USA, Inc.
- 当前专利权人： NXP USA, Inc.
- 当前专利权人地址： 6501 William Cannon Drive West Austin TX 78735 US
- 代理机构： Freescale law department - EMEA patent ops
- 优先权： US201213663636 20121030
- 主分类号： G11C8/08
- IPC分类号： G11C8/08 ; G11C16/04 ; G11C16/08 ; G11C16/26 ; G11C16/30
摘要：
A memory (101) having an array (103) of multi-gate memory cells and a word line driver circuit (115) coupled to a sector of memory cells of the array. In at least one mode of operation, the word line driver circuit is controllable to place an associated control gate word line coupled to the control gate word line driver and coupled to the sector in a floating state during a read operation where the sector is a non selected sector.
公开/授权文献
- EP2728582A1 Control gate word line driver circuit for multigate memory 公开/授权日：2014-05-07
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