发明公开
EP2733736A2 Method for electrically connecting wafers using butting contact struture and semiconductor device fabricated through the same
审中-公开
一种用于电晶片与抵靠接触结构连接方法和由此制得的半导体器件
- 专利标题： Method for electrically connecting wafers using butting contact struture and semiconductor device fabricated through the same
- 专利标题（中）： 一种用于电晶片与抵靠接触结构连接方法和由此制得的半导体器件
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申请号： EP13005391.1申请日： 2013-11-15
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公开(公告)号： EP2733736A2公开(公告)日： 2014-05-21
- 发明人: Jeon, In Gyun
- 申请人： Siliconfile Technologies Inc.
- 申请人地址： 20F, Bundang Square No 263, Seohyeon-dong Bundang-gu Seongnam-si Gyeonggi-do 463-050 KR
- 专利权人： Siliconfile Technologies Inc.
- 当前专利权人： Siliconfile Technologies Inc.
- 当前专利权人地址： 20F, Bundang Square No 263, Seohyeon-dong Bundang-gu Seongnam-si Gyeonggi-do 463-050 KR
- 代理机构： Samson & Partner
- 优先权： KR20120129899 20121116
- 主分类号： H01L23/00
- IPC分类号： H01L23/00 ; H01L23/48
摘要：
The present invention relates to a method for electrically connecting wafers, which physically bonds two wafers through an oxide-to-oxide bonding method and then electrically connects the two wafers through a butting contact structure. The wafers are physically bonded to each other through a relatively simple method, and then electrically connected to through TSVs or butting contact holes. Therefore, since the fabrication process may be simplified, a process error may be reduced, and the product yield may be improved.
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