发明公开
EP2763181A1 SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE
审中-公开
半导体器件和用于制造半导体器件的方法
- 专利标题： SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE
- 专利标题（中）： 半导体器件和用于制造半导体器件的方法
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申请号： EP12836645.7申请日： 2012-08-31
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公开(公告)号： EP2763181A1公开(公告)日： 2014-08-06
- 发明人: MASUDA, Takeyoshi , WADA, Keiji , HIYOSHI, Toru
- 申请人： Sumitomo Electric Industries, Ltd.
- 申请人地址： 5-33 Kitahama 4-chome Chuo-ku Osaka-shi, Osaka 541-0041 JP
- 专利权人： Sumitomo Electric Industries, Ltd.
- 当前专利权人： Sumitomo Electric Industries, Ltd.
- 当前专利权人地址： 5-33 Kitahama 4-chome Chuo-ku Osaka-shi, Osaka 541-0041 JP
- 代理机构： Grünecker, Kinkeldey, Stockmair & Schwanhäusser
- 优先权： JP2011208438 20110926
- 国际公布： WO2013047085 20130404
- 主分类号： H01L29/78
- IPC分类号： H01L29/78 ; H01L21/336 ; H01L29/06 ; H01L29/12
摘要：
A MOSFET (1) includes a semiconductor substrate having a trench formed in a main surface (10A), a gate oxide film (30), a gate electrode (40), and a source interconnection (60). A semiconductor substrate (10) includes an n-type drift layer (12) and a p-type body layer (13). The trench is formed to penetrate the body layer (13) and to reach the drift layer (12). The trench includes an outer peripheral trench (22) arranged to surround an active region when viewed two-dimensionally. On the main surface (10A) opposite to the active region when viewed from the outer peripheral trench (22), a potential fixing region (10C) where the body layer (13) is exposed is formed. The source interconnection (60) is arranged to lie over the active region when viewed two-dimensionally. The potential fixing region (10C) is electrically connected to the source interconnection (60).
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