发明公开
EP2965210A1 METHODS AND SYSTEMS FOR REDUCING THE AMOUNT OF TIME AND COMPUTING RESOURCES THAT ARE REQUIRED TO PERFORM A HARDWARE TABLE WALK
审中-公开
方法和系统减少了所需的时间和硬件表游动的计算机资源才能实现
- 专利标题： METHODS AND SYSTEMS FOR REDUCING THE AMOUNT OF TIME AND COMPUTING RESOURCES THAT ARE REQUIRED TO PERFORM A HARDWARE TABLE WALK
- 专利标题（中）： 方法和系统减少了所需的时间和硬件表游动的计算机资源才能实现
-
申请号： EP14712879.7申请日： 2014-03-04
-
公开(公告)号： EP2965210A1公开(公告)日： 2016-01-13
- 发明人: ZENG, Thomas , TOUZNI, Azzedine , TZENG, Tzung Ren , BOSTLEY, Phil J.
- 申请人： Qualcomm Incorporated
- 申请人地址： 5775 Morehouse Drive San Diego, CA 92121-1714 US
- 专利权人： Qualcomm Incorporated
- 当前专利权人： Qualcomm Incorporated
- 当前专利权人地址： 5775 Morehouse Drive San Diego, CA 92121-1714 US
- 代理机构： Wegner, Hans
- 优先权： US201313785877 20130305
- 国际公布： WO2014137970 20140912
- 主分类号： G06F12/10
- IPC分类号： G06F12/10
摘要：
A computer system and a method are provided that reduce the amount of time and computing resources that are required to perform a hardware table walk (HWTW) in the event that a translation lookaside buffer (TLB) miss occurs. If a TLB miss occurs when performing a stage 2 (S2) HWTW to find the PA at which a stage 1 (S1) page table is stored, the MMU uses the IPA to predict the corresponding PA, thereby avoiding the need to perform any of the S2 table lookups. This greatly reduces the number of lookups that need to be performed when performing these types of HWTW read transactions, which greatly reduces processing overhead and performance penalties associated with performing these types of transactions.
信息查询
