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    DUAL HOST EMBEDDED SHARED DEVICE CONTROLLER
    1.
    发明公开
    DUAL HOST EMBEDDED SHARED DEVICE CONTROLLER 审中-公开
    EINGEBETTET双主题 - STEUERUNG EINER GEMEINSAM GENUTZTEN VORRICHTUNG

    公开(公告)号：EP2972860A1

    公开(公告)日：2016-01-20

    申请号：EP14716473.5

    申请日：2014-03-07

    申请人： Qualcomm Incorporated

    发明人： SHACHAM, Assaf ,  GIL, Amit ,  TSIDON, Erez ,  LI, Yanru ,  TOUZNI, Azzedine

    IPC分类号： G06F9/52 ,  G06F9/46 ,  G06F9/54 ,  G06F1/32 ,  G06F11/07

    CPC分类号： G11C7/1075 ,  G06F1/3225 ,  G06F1/3275 ,  G06F1/3296 ,  G06F9/462 ,  G06F9/463 ,  G06F9/52 ,  G06F9/544 ,  G06F11/0757 ,  Y02D10/13 ,  Y02D10/14 ,  Y02D10/172

    摘要： Efficient techniques using a multi-port shared non-volatile memory are described that reduce latency in memory accesses from dedicated function specific processors, such as a modem control processor. The modem processor preempts a host processor that is accessing data from a multi-port shared non-volatile memory flash device allowing the modem processor to quickly access data in the flash device. The preemption process uses a doorbell interrupt initiated by a processor that seeks access and interrupts the processor being preempted. After preemption, the host processor may resume or restart the data access. Access control by the processors utilizes a hardware semaphore atomic control mechanism. Power control of the shared non-volatile memory modules includes at least one inactivity timer to indicate when a supply voltage to the shared non-volatile memory modules can be safely reduced or turned off. Power may be restarted by any of the processors sharing the memory, allowing fast access to the data.

    摘要翻译： 描述了使用多端口共享非易失性存储器的有效技术，其减少了诸如调制解调器控制处理器之类的专用功能特定处理器的存储器访问中的延迟。 调制解调器处理器抢占正在从多端口共享非易失性存储器闪存器件访问数据的主处理器，允许调制解调器处理器快速访问闪存设备中的数据。 抢占过程使用由寻求访问并处理器被抢占的处理器发起的门铃中断。 抢占后，主机处理器可以恢复或重新启动数据访问。 处理器的访问控制利用硬件信号量原子控制机制。 共享非易失性存储器模块的功率控制包括至少一个不活动定时器，以指示何时可以安全地减少或关闭共享的非易失性存储器模块的电源电压。 共享内存的任何处理器可能会重新启动电源，从而可以快速访问数据。

    METHOD AND APPARATUS FOR PREVENTING UNAUTHORIZED ACCESS TO CONTENTS OF A REGISTER UNDER CERTAIN CONDITIONS WHEN PERFORMING A HARDWARE TABLE WALK (HWTW)
    2.
    发明公开
    METHOD AND APPARATUS FOR PREVENTING UNAUTHORIZED ACCESS TO CONTENTS OF A REGISTER UNDER CERTAIN CONDITIONS WHEN PERFORMING A HARDWARE TABLE WALK (HWTW) 审中-公开
    方法和设备预防某些条件下TAB未经授权的访问内容设置在硬件表游动的实施办法（HWTW）

    公开(公告)号：EP2965211A1

    公开(公告)日：2016-01-13

    申请号：EP14731407.4

    申请日：2014-03-04

    申请人： Qualcomm Incorporated

    发明人： ZENG, Thomas ,  TOUZNI, Azzedine ,  TZENG, Tzung Ren ,  BOSTLEY, Phil J.

    IPC分类号： G06F12/14 ,  G06F21/79 ,  G06F12/10

    CPC分类号： G06F12/145 ,  G06F9/45504 ,  G06F12/1027 ,  G06F12/1491 ,  G06F21/79 ,  G06F2212/1032 ,  G06F2212/151 ,  G06F2212/152 ,  G06F2212/654 ,  G06F2212/68

    摘要： A security apparatus and method are provided for performing a security algorithm that prevents unauthorized access to contents of a physical address (PA) that have been loaded into a storage element of the computer system as a result of performing a prediction algorithm during a hardware table walk that uses a predictor to predict a PA based on a virtual address (VA). When the predictor is enabled, it might be possible for a person with knowledge of the system to configure the predictor to cause contents stored at a PA of a secure portion of the main memory to be loaded into a register in the TLB. In this way, a person who should not have access to contents stored in secure portions of the main memory could indirectly gain unauthorized access to those contents. The apparatus and method prevent such unauthorized access to the contents by masking the contents under certain conditions.

    摘要翻译： 本发明提供一种安全性的装置和方法，用于执行安全算法并防止对物理地址（PA）的内容的未授权访问thathave被加载到计算机系统的存储元件作为在对硬件表遍历执行预测算法的结果 没有使用预测基于虚拟地址（VA）预测PA。 当启用了预测，有可能与系统的知识的人员配置预测导致存储在主存储器的安全部分的内容PA被加载到TLB寄存器。 这样一来，谁shoulderstand无法访问存储在主存储器的安全部分可间接获得对这些数据的非法访问内容的人。 该设备和方法防止由某些条件下掩蔽的内容检查的内容的未授权访问。

    OFDM CHANNEL ESTIMATION
    3.
    发明授权
    OFDM CHANNEL ESTIMATION 有权
    OFDM信道估计

    公开(公告)号：EP2070280B1

    公开(公告)日：2011-08-24

    申请号：EP07837390.9

    申请日：2007-08-27

    申请人： Qualcomm Incorporated

    发明人： MA, Xiaoqiang ,  TOUZNI, Azzedine

    IPC分类号： H04L25/03 ,  H04L27/26

    CPC分类号： H04L25/03159 ,  H04L25/022 ,  H04L25/0224 ,  H04L27/261 ,  H04L2025/03414

    摘要： A receiver for receiving an orthogonal frequency division multiplexed (OFDM) digital video broadcast (DVB) signal including OFDM symbol sets including data symbols and pilot symbols transmitted using a plurality of sub-carriers, the OFDM DVB signal being transmitted toward the receiver via a transmission channel, the receiver including an input module configured to receive the OFDM DVB signal via the transmission channel, and a channel estimation module coupled to the input module and configured to calculate channel estimates of the transmission channel by performing Fourier transforms on the OFDM symbol sets to produce transformed symbol sets in the frequency domain and by performing minimum mean square error (MMSE) equalization on the transformed symbol sets using a sub-set of the pilot symbols in the OFDM DVB signal.

    METHOD, APPARATUS AND PROGRAM PRODUCT TO SAVE AND STORE SYSTEM MEMORY MANAGMENT UNIT CONTEXTS
    4.
    发明公开
    METHOD, APPARATUS AND PROGRAM PRODUCT TO SAVE AND STORE SYSTEM MEMORY MANAGMENT UNIT CONTEXTS 审中-公开
    方法，设备和程序产品节能及存储系统存储器管理部CONTEXTS

    公开(公告)号：EP2972897A2

    公开(公告)日：2016-01-20

    申请号：EP14725795.0

    申请日：2014-03-12

    申请人： Qualcomm Incorporated

    发明人： ZENG, Thomas, M. ,  TOUZNI, Azzedine ,  SARTORIUS,Thomas, Andrew

    IPC分类号： G06F12/10 ,  G06F12/12 ,  G06T1/60

    CPC分类号： G06F3/0631 ,  G06F3/0604 ,  G06F3/0673 ,  G06F12/10 ,  G06F12/12 ,  G06T1/60

    摘要： A wireless mobile device includes a graphic processing unit (GPU) that has a system memory management unit (MMU) for saving and restoring system MMU translation contexts. The system MMU is coupled to a memory and the GPU. The system MMU includes a set of hardware resources. The hardware resources may be context banks, with each of the context banks having a set of hardware registers. The system MMU also includes a hardware controller that is configured to restore a hardware resource associated with an access stream of content issued by an execution thread of the GPU. The associated hardware resource may be restored from the memory into a physical hardware resource when the hardware resource associated with the access stream of content is not stored within one of the hardware resources.

    OPTIMAL TWO-LAYER COHERENT DEMODULATION FOR D-PSK
    5.
    发明公开
    OPTIMAL TWO-LAYER COHERENT DEMODULATION FOR D-PSK 审中-公开
    优化，舞台，DPSK调制信号的相干解调

    公开(公告)号：EP2186280A2

    公开(公告)日：2010-05-19

    申请号：EP08780330.0

    申请日：2008-07-30

    申请人： Qualcomm Incorporated

    发明人： QI, Yihong ,  TOUZNI, Azzedine

    IPC分类号： H04L27/22

    CPC分类号： H04L27/2331

    摘要： A D-PSK demodulator utilizes a two-layer coherent approach to estimate the phase shift of adjacent symbols. There is generated a probability set of each received symbol being one of possible constellation values. There is also generated a probability set of each of possible phase difference between two adjacent symbols. This probability set is then converted into soft bit information according to specific mathematical operation.

    SYSTEM AND METHOD FOR PROVIDING SECURE ACCESS CONTROL TO A GRAPHICS PROCESSING UNIT
    9.
    发明公开
    SYSTEM AND METHOD FOR PROVIDING SECURE ACCESS CONTROL TO A GRAPHICS PROCESSING UNIT 有权
    系统和方法提供安全访问控制的图像处理单元

    公开(公告)号：EP3017396A1

    公开(公告)日：2016-05-11

    申请号：EP14745272.6

    申请日：2014-06-30

    申请人： Qualcomm Incorporated

    发明人： ZENG, Thomas ,  TOUZNI, Azzedine ,  TORZEWSKI, William

    IPC分类号： G06F21/71 ,  G06F21/74 ,  G06T1/20 ,  G06T1/60

    CPC分类号： G06F21/71 ,  G06F21/74 ,  G06F2221/2113 ,  G06T1/20

    摘要： Systems, methods, and computer programs are disclosed for providing secure access control to a graphics processing unit (GPU). One system includes a GPU, a plurality GPU programming interfaces, and a command processor. Each GPU programming interface is dynamically assigned to a different one of a plurality of security zones. Each GPU programming interface is configured to receive work orders issued by one or more applications associated with the corresponding security zone. The work orders comprise instructions to be executed by the GPU. The command processor is in communication with the plurality of GPU programming interfaces. The command processor is configured to control execution of the work orders received by the plurality of GPU programming interfaces using separate secure memory regions. Each secure memory region is allocated to one of the plurality of security zones.

    摘要翻译： 系统，方法，和计算机程序是游离缺失盘用于向图形处理单元（GPU）提供安全的访问控制。 一个系统包括GPU，多个GPU编程接口，和一个命令处理器。 每个GPU编程接口动态地分配给安全区域的多个不同的一个。 每个GPU编程接口被配置为接收通过与相应的安全区域相关联的一个或多个应用程序发出的工作单。 工作次序包括指令由GPU来执行。 该命令处理器与GPU的编程接口的多个通信。 命令处理器被配置为控制通过使用单独的安全存储器区域GPU编程接口的多个接收到的所述工作命令的执行。 每个安全存储器区域被分配到安全区域的多个之一。