A pseudo resistor circuit and a charge amplifier each include a first field effect transistor (Ma); a second field effect transistor (Mb) having electrical characteristics matched with electrical characteristics of the first field effect transistor (Ma); a voltage dividing circuit (21) in which one terminal of a reference resistor (Rstd) is electrically connected to a source terminal of the second field effect transistor; a first operational amplifier (OP1) an output terminal of which is connected to a gate terminal of the first field effect transistor and a gate terminal of the second field effect transistor and in which midpoint voltage of the voltage dividing circuit is input into one of an inverting input terminal and a non-inverting input terminal and reference voltage is input into the other of the inverting input terminal and the non-inverting input terminal; and a second operational amplifier (OP2) that supplies voltage resulting from inversion and amplification of drain voltage of the first field effect transistor into the other terminal of the reference resistor.