A encoder/decoder architecture that uses an arithmetic encoder to encode the MSB portions of the output of a Factorial Pulse Coder, that encodes the output of a first-level source encoder, e.g., MDCT. Sub-parts (e.g., frequency bands) of portions (e.g., frames) of the signal are suitably sorted in increasing order based on a measure related to signal energy (e.g., signal energy itself). In a system that overlays Arithmetic Encoding on Factorial Pulse coding results in bits re-allocated to bands with higher signal energy content yielding higher signal quality and higher bit utilization efficiency.