The application provides a field programmable gate array FPGA and a communication method. At least one application specific integrated circuit ASIC-based hard core used for communication and interconnection is embedded in the FPGA. The ASIC-based hard core includes a high-speed exchange and interconnection unit and at least one station. Each station is connected to the high-speed exchange and interconnection unit. The station is configured to transmit data between each functional module in the FPGA and the ASIC-based hard core. The high-speed exchange and interconnection unit is configured to transmit data between the stations. In the FPGA provided by the application, an ASIC-based hard core is embedded, which can facilitate data exchange between each functional module and the ASIC-based hard core in proximity and reduce a time delay. A source functional module sends data to a station; the station sends the data to the high-speed exchange and interconnection unit; and the high-speed exchange and interconnection unit sends the data to a destination functional module by using a station connected to the destination functional module. In this way, data is transmitted between the source functional module and the destination functional module.