发明公开
- 专利标题： RECEIVER TO PROCESS A LOAD MODULATED ANALOG INPUT SIGNAL
- 专利标题（中）： 接收器处理负载调制的模拟输入信号
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申请号： EP15194659.7申请日： 2015-11-16
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公开(公告)号： EP3168772A1公开(公告)日： 2017-05-17
- 发明人: Jongsma, Jakob
- 申请人： Panthronics AG
- 申请人地址： Sternäckerweg 16 8041 Graz AT
- 专利权人： Panthronics AG
- 当前专利权人： Panthronics AG
- 当前专利权人地址： Sternäckerweg 16 8041 Graz AT
- 代理机构： Schwarz & Partner Patentanwälte OG
- 主分类号： G06K7/00
- IPC分类号： G06K7/00 ; H04B1/10
摘要：
A Receiver (17) that receives a load modulated analog input signal (19) and outputs digital data (20) detected in the input signal (19), which receiver (17) comprises:
an in-phase mixer (21) that mixes the input signal (19) with an in-phase carrier frequency (22) and provides an in-phase component (23) of the down-converted input signal and a quadrature-phase mixer (24) that mixes the input signal (19) with a quadrature-phase carrier frequency (25) and provides a quadrature-phase component (26) of the down-converted input signal;
an amplifier (29, 30) to amplify the in-phase component (23) and the quadrature-phase component (26) of the down-converted input signal;
a DC block filter (31) to remove the DC component of the in-phase component (23) and the quadrature-phase component (26),
wherein the receiver furthermore comprises:
an in-phase correlator (33, 34) and a quadrature-phase correlator (35, 36) for each of the in-phase component (23) and the quadrature-phase component (26) to correlate the in-phase component (23) and the quadrature-component (26) with an in-phase component (37) and a quadrature-phase component (38) of a subcarrier or code clock frequency of the input signal (19);
a combiner (41) to combine four output signals (48 to 51) of the two in-phase correlators (33, 34) and the two quadrature-phase correlators (35, 36);
a slicer (43) to sample an output signal (42) of the combiner (41) at maximum energy levels to output the digital data (20) detected in the input signal (19).
an in-phase mixer (21) that mixes the input signal (19) with an in-phase carrier frequency (22) and provides an in-phase component (23) of the down-converted input signal and a quadrature-phase mixer (24) that mixes the input signal (19) with a quadrature-phase carrier frequency (25) and provides a quadrature-phase component (26) of the down-converted input signal;
an amplifier (29, 30) to amplify the in-phase component (23) and the quadrature-phase component (26) of the down-converted input signal;
a DC block filter (31) to remove the DC component of the in-phase component (23) and the quadrature-phase component (26),
wherein the receiver furthermore comprises:
an in-phase correlator (33, 34) and a quadrature-phase correlator (35, 36) for each of the in-phase component (23) and the quadrature-phase component (26) to correlate the in-phase component (23) and the quadrature-component (26) with an in-phase component (37) and a quadrature-phase component (38) of a subcarrier or code clock frequency of the input signal (19);
a combiner (41) to combine four output signals (48 to 51) of the two in-phase correlators (33, 34) and the two quadrature-phase correlators (35, 36);
a slicer (43) to sample an output signal (42) of the combiner (41) at maximum energy levels to output the digital data (20) detected in the input signal (19).
公开/授权文献
- EP3168772B1 RECEIVER TO PROCESS A LOAD MODULATED ANALOG INPUT SIGNAL 公开/授权日：2018-03-14
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