公开(公告)号：EP3168772B1

公开(公告)日：2018-03-14

申请号：EP15194659.7

申请日：2015-11-16

申请人： Panthronics AG

发明人： Jongsma, Jakob

IPC分类号： G06K7/00 ,  H04B1/10

CPC分类号： H04L27/22 ,  G06K7/0008 ,  H04B1/30

摘要： A Receiver (17) that receives a load modulated analog input signal (19) and outputs digital data (20) detected in the input signal (19), which receiver (17) comprises: an in-phase mixer (21) that mixes the input signal (19) with an in-phase carrier frequency (22) and provides an in-phase component (23) of the down-converted input signal and a quadrature-phase mixer (24) that mixes the input signal (19) with a quadrature-phase carrier frequency (25) and provides a quadrature-phase component (26) of the down-converted input signal; an amplifier (29, 30) to amplify the in-phase component (23) and the quadrature-phase component (26) of the down-converted input signal; a DC block filter (31) to remove the DC component of the in-phase component (23) and the quadrature-phase component (26), wherein the receiver furthermore comprises: an in-phase correlator (33, 34) and a quadrature-phase correlator (35, 36) for each of the in-phase component (23) and the quadrature-phase component (26) to correlate the in-phase component (23) and the quadrature-component (26) with an in-phase component (37) and a quadrature-phase component (38) of a subcarrier or code clock frequency of the input signal (19); a combiner (41) to combine four output signals (48 to 51) of the two in-phase correlators (33, 34) and the two quadrature-phase correlators (35, 36); a slicer (43) to sample an output signal (42) of the combiner (41) at maximum energy levels to output the digital data (20) detected in the input signal (19).

公开(公告)号：EP3267589A1

公开(公告)日：2018-01-10

申请号：EP16178121.6

申请日：2016-07-06

申请人： Panthronics AG

发明人： Jongsma, Jakob ,  Crols, Jan

IPC分类号： H04B1/18 ,  H04B1/30 ,  G06K7/10 ,  G06K19/07 ,  H01Q1/22 ,  G06K7/00

摘要： A system of an antenna (8) and an integrated circuit (9) with at least one input pin (10) to receive an antenna signal (11) with a carrier frequency and to demodulate data modulated within the antenna signal (11), which system comprises an antenna signal processing circuit (12) to process the antenna signal (11) from the antenna (8) and a demodulator (14) to demodulate the processed antenna signal (13) and to provide the received data wherein the antenna (8) is directly connected to the input pin (10) and that the antenna signal processing circuit (12) realized within the integrated circuit (9) comprises a passive resistor (15) with a first connection (16) connected to the input pin (10) to transfer the high voltage of the antenna signal (11) into a current domain antenna signal (17) at a second connection (18) of the passive resistor (15).

摘要翻译： 一种具有至少一个输入引脚（10）的天线（8）和集成电路（9）的系统，用于接收具有载波频率的天线信号（11）并解调在天线信号（11）内调制的数据，其中 系统包括用于处理来自天线（8）的天线信号（11）的天线信号处理电路（12）和用于解调处理后的天线信号（13）并提供接收到的数据的解调器（14），其中天线 ）直接连接到输入引脚（10）并且在集成电路（9）内实现的天线信号处理电路（12）包括具有连接到输入引脚（10）的第一连接（16）的无源电阻器（15） ）以在无源电阻器（15）的第二连接（18）处将天线信号（11）的高电压传送到电流域天线信号（17）。

公开(公告)号：EP3203635B1

公开(公告)日：2018-05-09

申请号：EP16154369.9

申请日：2016-02-05

申请人： Panthronics AG

发明人： Crols, Jan ,  Felicijan, Tomaz ,  Jongsma, Jakob ,  Pieber, Michael ,  Nassar, Hamzeh

IPC分类号： H03L7/06 ,  H04L27/26

CPC分类号： H04L27/266 ,  H03L7/06 ,  H03L7/16

摘要： A device (1)) with an antenna that receives a target carrier signal (3) from a remote target (2) and transmits a device carrier signal (6) modulated with data to communicate data between the device (1) and the target (2), which device (1) comprises: clock extraction means (4) to extract a target clock (5) from the target carrier signal (3); driver means (9) to generate the device carrier signal (6) from a device clock (8); synchronization means (7) to synchronize the frequency and phase of the device clock (8) with the target clock (5), wherein that the synchronization means (7) comprise: time measurement means (10) to measure the phase difference between the target clock (5) and the device clock (8) or an internal device clock (33) related to the device clock (8) and to provide a phase information ( Õ 1 , Õ 2 , Õ 3 ); measurement control means (20) to initiate a first time measurement that results in a first phase information ( Õ 1 ) and to initiate a second time measurement a fixed time period (”T) after the first time measurement that results in a second phase information ( Õ 2 ); frequency correction means (11) to correct the frequency of the device clock (8) and/or the internal device clock (33) to the frequency of the target clock (5) based on an evaluation of the first phase information ( Õ 1 ) and second phase information ( Õ 2 ) by evaluation means (21); which measurement control means (20) are built to initiate a third time measurement after the frequency correction of the device clock (8) and/or the internal device clock (33) that results in a third phase information ( Õ 3 ) evaluated by the evaluation means (21) and corrected by phase correction means (22) which correct the phase of the device clock (8) to the phase of the target clock (5).

公开(公告)号：EP3160165A1

公开(公告)日：2017-04-26

申请号：EP15190964.5

申请日：2015-10-22

申请人： Panthronics AG

发明人： Pieber, Michael ,  Felicijan, Tomaz ,  Jongsma, Jakob

IPC分类号： H04W4/00 ,  H04B5/00

CPC分类号： H04W4/80 ,  H04B5/0031 ,  H04B5/0056

摘要： A device (5; 16; 26) that processes a Near Field Communication type application which device (5; 16; 26) comprises:
a host controller circuit (3; 27) that processes device applications, that use the Near Field Communication type application, and that processes a host driver (7; 28) that communicates based on a first interface protocol (NCI; EMV);
a NFC controller circuit (4; 33) that processes a Near Field Communication type contactless interface (6; 35) and a controller driver (11; 32) that interfaces with the host controller circuit (3; 27), wherein the host controller circuit (3; 27) processes a first transmission module (9; 30) that interfaces with the host driver (7; 28) based on the first interface protocol (NCI; EMV) and with the controller driver (11; 32) based on a second interface protocol, which first transmission module (9; 30) furthermore processes substantially all none-time critical and/or
memory consuming tasks of the Near Field Communication type application and wherein the NFC controller circuit (4; 33) comprises a second transmission module (12, 34) that processes all time critical tasks for the Near Field Communication type application towards the Near Field Communication type contactless interface (6; 35).

摘要翻译： 一种处理近场通信类型应用的设备（5; 16; 26），该设备（5; 16; 26）包括：主机控制器电路（3; 27），其处理使用近场通信类型应用 并且处理基于第一接口协议（NCI; EMV）进行通信的主机驱动器（7; 28）; ，处理与所述主控制器电路（3; 27）接口的近场通信型非接触式接口（6; 35）和控制器驱动器（11; 32）的NFC控制器电路（4; 33），其中所述主控制器电路 （3; 27）基于第一接口协议（NCI; EMV）和控制器驱动器（11; 32）处理与主机驱动器（7; 28）接口的第一传输模块 所述第一传输模块（9; 30）还处理所述近场通信类型应用的基本上所有非时间关键和/或存储器消耗任务，并且其中所述NFC控制器电路（4; 33）包括第二传输模块 （12,34），其处理近场通信类型应用朝向近场通信类型非接触式接口（6; 35）的所有时间关键任务。

公开(公告)号：EP4020811A1

公开(公告)日：2022-06-29

申请号：EP20217010.6

申请日：2020-12-23

申请人： Panthronics AG

发明人： Jongsma, Jakob ,  Felicijan, Tomaz ,  Pieber, Michael

IPC分类号： H03L7/08 ,  H04B5/00 ,  H04W52/02 ,  H03L7/183

摘要： A system (1) of a Host IC (2) connected via a wired data interface to a Client IC (3) to initiate the communication between the Host IC (2) and the Client IC (3) after power-on, wherein the Client IC (3) comprises a PLL stage (4) with a closed loop of a phase detector (5) a filter (6) and a voltage controlled oscillator (7) for the generation of the clock (C-clk) for the Client IC (3), which PLL stage (4) needs to be locked to the clock (H-clk) of the Host IC (2) for regular data communication via the wired data interface, which Client IC (3) comprises a power-on stage (4) to steer a switch (14) in the connection between the input of the clock (H-clk) of the Host IC (2) for the PLL stage (4) and the voltage controlled oscillator (7) of the PLL stage (4) to open the connection and to use the unregulated output clock of the free-running voltage controlled oscillator (7) in a time period after power-on for a power-on data communication via the wired data interface and to close the switch (14) after that time period for regular data communication.

公开(公告)号：EP3182585B1

公开(公告)日：2020-07-22

申请号：EP15199768.1

申请日：2015-12-14

申请人： Panthronics AG

发明人： Crols, Jan ,  Gabriels, Steven ,  Jongsma, Jakob

IPC分类号： H03F3/21 ,  H03F3/195 ,  H03M1/74

公开(公告)号：EP3160165B1

公开(公告)日：2018-08-15

申请号：EP15190964.5

申请日：2015-10-22

申请人： Panthronics AG

发明人： Pieber, Michael ,  Felicijan, Tomaz ,  Jongsma, Jakob

IPC分类号： H04W4/00 ,  H04B5/00

CPC分类号： H04B5/0031 ,  H04B5/0056 ,  H04B5/0062 ,  H04L67/104 ,  H04L69/08 ,  H04W4/80

摘要： A device (5; 16; 26) that processes a Near Field Communication type application which device (5; 16; 26) comprises: a host controller circuit (3; 27) that processes device applications, that use the Near Field Communication type application, and that processes a host driver (7; 28) that communicates based on a first interface protocol (NCI; EMV); a NFC controller circuit (4; 33) that processes a Near Field Communication type contactless interface (6; 35) and a controller driver (11; 32) that interfaces with the host controller circuit (3; 27), wherein the host controller circuit (3; 27) processes a first transmission module (9; 30) that interfaces with the host driver (7; 28) based on the first interface protocol (NCI; EMV) and with the controller driver (11; 32) based on a second interface protocol, which first transmission module (9; 30) furthermore processes substantially all none-time critical and/or memory consuming tasks of the Near Field Communication type application and wherein the NFC controller circuit (4; 33) comprises a second transmission module (12, 34) that processes all time critical tasks for the Near Field Communication type application towards the Near Field Communication type contactless interface (6; 35).

公开(公告)号：EP3182585A1

公开(公告)日：2017-06-21

申请号：EP15199768.1

申请日：2015-12-14

申请人： Panthronics AG

发明人： Crols, Jan ,  Gabriels, Steven ,  Jongsma, Jakob

IPC分类号： H03F3/21 ,  H03F3/195 ,  H03M1/74

摘要： A Digital power amplifier (13) to drive an RFID antenna (10) with a substantial sinusoidal output current (I) which digital power amplifier (13) comprises:
an integrated circuit (IC2) with a first transmission output pin (15) and a second transmission output pin (16) to provide an output signal (17);
an adaption circuit (14) of discrete components (C2a, C2b) connected to the first and second transmission output pin (15, 16) to adapt the output signal (17) and feed the substantial sinusoidal output current (1) with a transmission resonance frequency to the RFID antenna (10), wherein the integrated circuit (IC2) comprises:
a digital control section (19) with a number ofN wave-forming contacts (20) to output a digital wave-forming bit combination of N bits with a clock frequency M-times the transmission resonance frequency;
a number ofN driver blocks (21) each connected with a first contact (22) to one of the wave-forming contacts (20) and a number of N/2 of them connected with a second contact to the first transmission output pin (15) and the other number of N/2 of them connected with their second contact to the second transmission output pin (16), which driver blocks (21) are built to provide increments of the substantial sinusoidal output current (I) to the first and second transmission output pin (15, 16).

摘要翻译： 一种数字功率放大器（13），用于驱动具有基本正弦输出电流（I）的RFID天线（10），数字功率放大器（13）包括：具有第一传输输出引脚（15）的集成电路（IC2） 第二传输输出引脚（16），以提供输出信号（17）; - 连接到第一和第二传输输出引脚（15,16）的分立元件（C2a，C2b）的自适应电路（14），以适应输出信号（17）并馈送基本正弦输出电流（1） 所述集成电路（IC2）包括：数字控制部分（19），所述数字控制部分具有多个N个波形形成触点（20），以将N位的数字波形组合输出到所述RFID天线 时钟频率是传输谐振频率的M倍; 多个N个驱动块（21），每个驱动块（21）与第一触点（22）连接到其中一个波形触点（20），并且其中的N / 2个触点块与第二触点连接到第一传输输出引脚 ），并且其中N / 2个的其中另外N / 2个与它们的第二触点连接到第二变速器输出引脚（16），所述驱动器块（21）被构建为向第一和第二变速器输出引脚（16）提供基本正弦输出电流 第二传输输出引脚（15,16）。

公开(公告)号：EP3493414A1

公开(公告)日：2019-06-05

申请号：EP17205160.9

申请日：2017-12-04

申请人： Panthronics AG

发明人： Lessiak, Andreas ,  Jongsma, Jakob

IPC分类号： H04B5/00 ,  H04B13/00

摘要： A communication apparatus (1) that comprises a NFC communication module with an antenna (2) to transmit and receive NFC Information (5, 6) over the antenna (2) based on the NFC Standard and that comprises an HBC communication module with at least one pad (14) to transmit and receive HBC Information (15) over the at least one pad (14) via a human body wherein the HBC communication module comprises HBC modulation means (17) to transmit and receive HBC Information (15) modulated in HBC frequency sidebands (18, 19) outside or slightly overlapping the NFC frequency band (7) to enable a parallel and independent communication of NFC Information (5, 6) and HBC Information (15).

公开(公告)号：EP3203635A1

公开(公告)日：2017-08-09

申请号：EP16154369.9

申请日：2016-02-05

申请人： Panthronics AG

发明人： Crols, Jan ,  Felicijan, Tomaz ,  Jongsma, Jakob ,  Pieber, Michael ,  Nassar, Hamzeh

IPC分类号： H03L7/06 ,  H04L27/26

CPC分类号： H04L27/266 ,  H03L7/06 ,  H03L7/16

摘要： A device (1)) with an antenna that receives a target carrier signal (3) from a remote target (2) and transmits a device carrier signal (6) modulated with data to communicate data between the device (1) and the target (2), which device (1) comprises:
clock extraction means (4) to extract a target clock (5) from the target carrier signal (3);
driver means (9) to generate the device carrier signal (6) from a device clock (8);
synchronization means (7) to synchronize the frequency and phase of the device clock (8) with the target clock (5), wherein that the synchronization means (7) comprise:
time measurement means (10) to measure the phase difference between the target clock (5) and the device clock (8) or an internal device clock (33) related to the device clock (8) and to provide a phase information ( ϕ 1 , ϕ 2 , ϕ 3 );
measurement control means (20) to initiate a first time measurement that results in a first phase information ( ϕ 1 ) and to initiate a second time measurement a fixed time period (ΔT) after the first time measurement that results in a second phase information ( ϕ 2 );
frequency correction means (11) to correct the frequency of the device clock (8) and/or the internal device clock (33) to the frequency of the target clock (5) based on an evaluation of the first phase information ( ϕ 1 ) and second phase information ( ϕ 2 ) by evaluation means (21);
which measurement control means (20) are built to initiate a third time measurement after the frequency correction of the device clock (8) and/or the internal device clock (33) that results in a third phase information ( ϕ 3 ) evaluated by the evaluation means (21) and corrected by phase correction means (22) which correct the phase of the device clock (8) to the phase of the target clock (5).

摘要翻译： 1。一种具有天线的设备（1），所述天线从远程目标（2）接收目标载波信号（3）并且发送用数据调制的设备载波信号（6）以在所述设备（1）与所述目标 （1）包括：时钟提取装置（4），用于从目标载波信号（3）提取目标时钟（5）;时钟提取装置 驱动装置（9），用于从设备时钟（8）产生设备载波信号（6）; 用于同步装置时钟（8）的频率和相位以及目标时钟（5）的同步装置（7），其中同步装置（7）包括：时间测量装置（10），用于测量目标 时钟（5）和与装置时钟（8）有关的装置时钟（8）或内部装置时钟（33），并提供相位信息（φ1，φ2，φ3）。 测量控制装置（20），用于启动导致第一相位信息（φ1）的第一时间测量并且在导致第二相位信息（φ2）的第一时间测量之后的固定时间段（ΔT）内启动第二时间测量 ）; 频率校正装置（11），用于基于对第一相位信息（φ1）的评估来将装置时钟（8）和/或内部装置时钟（33）的频率校正为目标时钟（5） 由评估装置（21）得到第二相位信息（φ2）; 所述测量控制装置（20）被建立以在对所述评估评估的第三相位信息（φ3）进行装置时钟（8）和/或内部装置时钟（33）的频率校正之后启动第三时间测量 装置（21），并由相位校正装置（22）校正，该装置将设备时钟（8）的相位校正成目标时钟（5）的相位。