The present invention relates to the technical field of semiconductor processes and discloses a semiconductor device and a manufacturing method therefor. The method includes: providing a substrate containing a first dielectric layer; forming a lower gate material layer on the first dielectric layer; patterning the lower gate material layer to form gate lines; depositing a second dielectric layer to cover the gate lines; planarizing the second dielectric layer; forming an insulating buffer material layer; patterning the insulating buffer material layer to form a patterned insulating buffer layer containing multiple separate portions, each separate portion extending to intersect one or more gate lines; selectively growing a graphene layer on the patterned insulating buffer layer; forming a third dielectric layer to cover the graphene layer and the second dielectric layer; and forming an upper gate electrode layer on the third dielectric layer. In the present invention, a patterned graphene layer may be obtained by means of the selective growth of graphene, thereby avoiding undesired effects from patterning the graphene. In addition, the semiconductor device of the present invention may use a dual-gate structure that can offer better current control.