发明公开
- 专利标题: MOS TRANSISTOR OFFSET-CANCELLING DIFFERENTIAL CURRENT-LATCHED SENSE AMPLIFIER
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申请号: EP17772855.7申请日: 2017-09-18
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公开(公告)号: EP3516654A1公开(公告)日: 2019-07-31
- 发明人: NA, Taehui , SONG, Byung Kyu , JUNG, Seong-Ook , KIM, Jung Pill , KANG, Seung, Hyuk
- 申请人: Qualcomm Technologies, Inc. , Industry-Academic Cooperation Foundation Yonsei University
- 申请人地址: 5775 Morehouse Drive San Diego, CA 92121-1714 US
- 专利权人: Qualcomm Technologies, Inc.,Industry-Academic Cooperation Foundation Yonsei University
- 当前专利权人: Qualcomm Technologies, Inc.,Industry-Academic Cooperation Foundation Yonsei University
- 当前专利权人地址: 5775 Morehouse Drive San Diego, CA 92121-1714 US
- 代理机构: Dunlop, Hugh Christopher
- 优先权: US201615274034 20160923
- 国际公布: WO2018057460 20180329
- 主分类号: G11C7/06
- IPC分类号: G11C7/06 ; G11C11/16 ; G11C7/08
摘要:
Metal-oxide semiconductor (MOS) transistor offset-cancelling (OC), zero-sensing (ZS) dead zone, current-latched sense amplifiers (SAs) (CLSAs) (OCZS-SAs) for sensing differential voltages are provided. An OCZS-SA is configured to amplify received differential data and reference input voltages with a smaller sense amplifier offset voltage to provide larger sense margin between different storage states of memory bitcell(s). The OCZS-SA is configured to cancel out offset voltages of input and complement input transistors, and keep the input and complement input transistors in their activated state during sensing phases so that sensing is not performed in their “dead zones” when their gate-to-source voltage (Vgs) is below their respective threshold voltages. In other aspects, sense amplifier capacitors are configured to directly store the data and reference input voltages at gates of the input and complement input transistors during voltage capture phases to avoid additional layout area that would otherwise be consumed with additional sensing capacitor circuits.
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