- 专利标题： POWER MANAGEMENT FOR LOGIC STATE RETENTION
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申请号： EP19179238.1申请日： 2019-06-10
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公开(公告)号： EP3582060A1公开(公告)日： 2019-12-18
- 发明人: Pelicia, Marcos Mauricio , Rocha Prado, Alex
- 申请人： NXP USA, Inc.
- 申请人地址： 6501 William Cannon Drive West Austin TX 78735 US
- 专利权人： NXP USA, Inc.
- 当前专利权人： NXP USA, Inc.
- 当前专利权人地址： 6501 William Cannon Drive West Austin TX 78735 US
- 代理机构： Miles, John Richard
- 优先权： US201816010050 20180615
- 主分类号： G05F1/563
- IPC分类号： G05F1/563 ; G06F1/32
摘要：
A power management system is provided. The power management system includes a first voltage regulator having an input coupled to a first voltage supply terminal and an output. The first voltage regulator is configured to provide an operating voltage at the output. A second voltage regulator has an input coupled to the output of the first voltage regulator. The second voltage regulator is configured to provide at an output a retention voltage based on a control signal. A control circuit is coupled to the second voltage regulator and configured to provide the control signal to the second voltage regulator.
公开/授权文献
- EP3582060B1 POWER MANAGEMENT FOR LOGIC STATE RETENTION 公开/授权日：2022-05-18
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