SYSTEM FOR SYNCHRONOUSLY DISCHARGING MULTIPLE CAPACITIVE LOADS

    公开(公告)号:EP3739738A1

    公开(公告)日:2020-11-18

    申请号:EP20173416.7

    申请日:2020-05-07

    申请人: NXP USA, Inc.

    IPC分类号: H02M1/36 H02H3/24 H02M1/32

    摘要: An apparatus and method for synchronously discharging multiple capacitive loads. In one embodiment, the apparatus includes first and second discharge circuits for discharging first and second capacitive loads, respectively. The apparatus also includes a control circuit coupled to the first and second discharge circuits and configured to control the second discharge circuit. The control circuit includes a first scaler circuit configured to generate a first scaled voltage based on a first voltage on the first capacitive load, a second scaler circuit configured to generate a second scaled voltage based on a second voltage on the second capacitive load, and a comparator circuit for comparing the first and second scaled voltages. The comparator circuit asserts a control signal when the second scaled voltage exceeds the first scaled voltage. The second discharge circuit discharges the second capacitive load when the comparator circuit asserts its control signal.

    VOLTAGE REGULATOR WITH LOAD CURRENT PREDICTION AND METHOD THEREFOR

    公开(公告)号:EP3410251A1

    公开(公告)日:2018-12-05

    申请号:EP18173659.6

    申请日:2018-05-22

    申请人: NXP USA, Inc.

    IPC分类号: G05F1/46 G05F1/565 G05F1/575

    摘要: A voltage regulator includes first and second bias circuits, a transistor, and a load prediction circuit. The transistor has a first current electrode coupled to a first power supply voltage terminal, a second current electrode for providing a regulated output voltage, and a control electrode. The first biasing circuit is for providing a first bias voltage to the control electrode of the transistor in response to a feedback signal generated from the regulated output voltage. The second biasing circuit is for providing a second bias voltage to the control electrode of the transistor in response to a control signal. The load current prediction circuit is coupled to the second biasing circuit. The load prediction circuit is for providing the control signal to the second biasing circuit in response to determining that a load current at the second current electrode is expected to increase.

    POWER MANAGEMENT FOR LOGIC STATE RETENTION
    3.
    发明公开

    公开(公告)号:EP3582060A1

    公开(公告)日:2019-12-18

    申请号:EP19179238.1

    申请日:2019-06-10

    申请人: NXP USA, Inc.

    IPC分类号: G05F1/563 G06F1/32

    摘要: A power management system is provided. The power management system includes a first voltage regulator having an input coupled to a first voltage supply terminal and an output. The first voltage regulator is configured to provide an operating voltage at the output. A second voltage regulator has an input coupled to the output of the first voltage regulator. The second voltage regulator is configured to provide at an output a retention voltage based on a control signal. A control circuit is coupled to the second voltage regulator and configured to provide the control signal to the second voltage regulator.

    SAMPLE AND HOLD CIRCUIT
    4.
    发明公开
    SAMPLE AND HOLD CIRCUIT 审中-公开
    采样和保持电路

    公开(公告)号:EP3282451A1

    公开(公告)日:2018-02-14

    申请号:EP17182442.8

    申请日:2017-07-20

    申请人: NXP USA, Inc.

    IPC分类号: G11C27/02 H02M3/07

    CPC分类号: H03K17/6872 G11C27/024

    摘要: Aspects of various embodiments of the present disclosure are directed to applications utilizing voltage sampling. In certain embodiments, a sample and hold circuit is configured to sample voltages that exceed a tolerance voltage of components. The circuit includes a first and a second capacitors. In a first mode, a voltage difference between an input node and a first reference voltage is sampled using the first capacitor. Also in the first mode, a voltage stored by the second capacitor is referenced to a second reference voltage and provided to a first output node. In a second mode, a voltage difference between an input node and a first reference voltage is sampled using the second capacitor. Also in the second mode, a voltage stored by the first capacitor is referenced to the second reference voltage and provided to a second output node.

    摘要翻译: 本公开的各种实施例的方面涉及利用电压采样的应用。 在某些实施例中,采样和保持电路被配置为对超过部件的容差电压的电压进行采样。 该电路包括第一和第二电容器。 在第一模式中,使用第一电容器对输入节点与第一参考电压之间的电压差进行采样。 同样在第一模式中,由第二电容器存储的电压以第二参考电压为基准并被提供给第一输出节点。 在第二模式中,使用第二电容器对输入节点与第一参考电压之间的电压差进行采样。 同样在第二模式中,由第一电容器存储的电压以第二参考电压为基准并被提供给第二输出节点。