Gate-all-around integrated circuit structures having underlying dopant-diffusion blocking layers (250) are described. For example, an integrated circuit structure includes a vertical arrangement of horizontal nanowires (206) above a fin. The fin includes a dopant diffusion blocking layer (250) on a first semiconductor layer (202), and a second semiconductor layer on the dopant diffusion blocking layer. A gate stack (226, 228) is around the vertical arrangement of horizontal nanowires. A first epitaxial source or drain structure (222, 224) is at a first end of the vertical arrangement of horizontal nanowires. A second epitaxial source or drain structure (222, 224) is at a second end of the vertical arrangement of horizontal nanowires.