- 专利标题： BITCELL WITH MULTIPLE READ BITLINES
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申请号： EP21161142.1申请日： 2021-03-05
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公开(公告)号： EP3882917A1公开(公告)日： 2021-09-22
- 发明人: CHEN, Andy Wangkun , CHONG, Yew Keong , THYAGARAJAN, Sriram , AMIRANTE, Ettore
- 申请人： ARM Limited
- 申请人地址： GB Cambridgeshire CB1 9NJ 110 Fulbourn Road Cambridge
- 代理机构： TLIP Limited
- 优先权： US202016824663 20200319
- 主分类号： G11C8/16
- IPC分类号： G11C8/16 ; G11C11/419 ; G11C11/417 ; G11C11/418 ; G11C7/10 ; G11C11/54 ; G06N3/063
摘要：
Various implementations described herein are related to a device having a bitcell. The device may include horizontal bitlines coupled to the bitcell. The horizontal bitlines may include multiple first read bitlines disposed in a horizontal direction with respect to the bitcell. The device may include vertical bitlines coupled to the bitcell. The vertical bitlines may include multiple second read bitlines disposed in a vertical direction with respect to the bitcell.
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