- 专利标题： A BUFFER COMPATIBLE WITH SKEW CRITICAL PROTOCOLS IMPLEMENTED IN AN INTEGRATED CIRCUIT AND METHODS FOR ROUTING METAL LINES TO THE BUFFER IN THE INTEGRATED CIRCUIT
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申请号： EP24168500.7申请日： 2024-04-04
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公开(公告)号： EP4451565A1公开(公告)日： 2024-10-23
- 发明人: Agarwal, Gaurav , Mangal, Himanshu , Jain, Siddhartha , Kalra, Sachin , Agarwal, Amol
- 申请人： NXP USA, Inc.
- 申请人地址： US Austin TX 78735 6501 William Cannon Drive
- 代理机构： Miles, John Richard
- 优先权： IN202341028335 20230418
- 主分类号： H03K19/0175
- IPC分类号： H03K19/0175 ; G06F30/394 ; H01L27/04
摘要：
A buffer (100) in an integrated circuit comprises one or more logic circuits, an input signal pin (106) electrically coupled to an input of one of the one or more logic circuits, and an output signal pin (108) electrically coupled to an output of one of the one or more logic circuits. The input signal pin and output signal pin are positioned on a same routing track (114) of the integrated circuit which specifies a routing in the integrated circuit. A respective segment (104, 105) of a net routed to the input and output signal pin is on the same routing track.
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