Invention Patent
JP2003068922A Semiconductor chip mounting substrate and semiconductor device using the same
有权
半导体芯片安装基板和使用该半导体器件的半导体器件
- Patent Title: Semiconductor chip mounting substrate and semiconductor device using the same
- Patent Title (中): 半导体芯片安装基板和使用该半导体器件的半导体器件
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Application No.: JP2001252658Application Date: 2001-08-23
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Publication No.: JP2003068922APublication Date: 2003-03-07
- Inventor: YOSHINO MAKOTO , SAKAMOTO KUNIO , MURATA KENSHIYOU
- Applicant: Texas Instr Japan Ltd , 日本テキサス・インスツルメンツ株式会社
- Assignee: Texas Instr Japan Ltd,日本テキサス・インスツルメンツ株式会社
- Current Assignee: Texas Instr Japan Ltd,日本テキサス・インスツルメンツ株式会社
- Priority: JP2001252658 2001-08-23
- Main IPC: H01L23/12
- IPC: H01L23/12 ; H01L21/58 ; H01L23/31 ; H01L23/498 ; H05K3/24
Abstract:
PROBLEM TO BE SOLVED: To reduce warp of a substrate which is caused by curing contraction or the like of an insulating pattern, while the insulating pattern is formed on the substrate so as to be interposed between a semiconductor chip and a conductor pattern.
SOLUTION: This substrate is provided with a flexible substrate 11 (insulating film 16) having a chip mounting region for mounting the semiconductor chip on a surface via adhesive agent, a conductor pattern 20 which is formed on the surface of the substrate 11 and electrically connected with the semiconductor chip in a region outside the chip mounting region, and the insulating pattern 21 formed on the surface of the substrate 11 so as to be interposed between the semiconductor chip and the conductor pattern 20. The insulating pattern 21 is partially formed in the chip mounting region.
COPYRIGHT: (C)2003,JPO
SOLUTION: This substrate is provided with a flexible substrate 11 (insulating film 16) having a chip mounting region for mounting the semiconductor chip on a surface via adhesive agent, a conductor pattern 20 which is formed on the surface of the substrate 11 and electrically connected with the semiconductor chip in a region outside the chip mounting region, and the insulating pattern 21 formed on the surface of the substrate 11 so as to be interposed between the semiconductor chip and the conductor pattern 20. The insulating pattern 21 is partially formed in the chip mounting region.
COPYRIGHT: (C)2003,JPO
Public/Granted literature
- JP4701563B2 Semiconductor chip mounting substrate and a semiconductor device using the same Public/Granted day:2011-06-15
Information query
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