Invention Patent
JPS62117360A Cmos output stage with stable large voltage amplitude and zero input current
失效
CMOS输出级具有稳定的大电压放大和零输入电流
- Patent Title: Cmos output stage with stable large voltage amplitude and zero input current
- Patent Title (中): CMOS输出级具有稳定的大电压放大和零输入电流
-
Application No.: JP21908686Application Date: 1986-09-17
-
Publication No.: JPS62117360APublication Date: 1987-05-28
- Inventor: DANIERU SENDEROBITSUCHI , JIERUMAANO NIKORIINI
- Applicant: Sgs Microelettronica Spa
- Assignee: Sgs Microelettronica Spa
- Current Assignee: Sgs Microelettronica Spa
- Priority: IT2218185 1985-09-18
- Main IPC: H01L21/8238
- IPC: H01L21/8238 ; H01L21/8234 ; H01L27/088 ; H01L27/092 ; H03F1/32 ; H03F3/18 ; H03F3/30
Public/Granted literature
- JP2818165B2 Public/Granted day:1998-10-30
Information query
IPC分类: