本揭露实施例提供一种具有密封环结构之集成电路结构。该密封环结构包含一低k介电层、一第一密封环及一第二密封环。该第一密封环与该第二密封环彼此间隔开。该第一密封环及该第二密封环中之每一者包括一金属层。该金属层嵌入于该低k介电层中，且该金属层包含具有复数个开口之一主体图案。该主体图案对该第一密封环及该第二密封环之该金属层之面积比率大于或等于50％且小于100％。

An integrated circuit structure with seal ring structure is provided. The seal ring structure includes a low k dielectric layer, a first seal ring and a second seal ring. The first seal ring and the second seal ring are spaced from each other. Each of the first seal ring and the second seal ring comprises a metal layer. The metal layer is embedded in the low k dielectric layer, and the metal layer includes a body pattern having a plurality of openings. The area ratio of the body pattern to the metal layer of the first seal ring and the second seal ring is greater than or equal to 50% and less than 100%.