Invention Grant
- Patent Title: Arrays of memory cells and methods of forming an array of memory cells
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Application No.: US15852275Application Date: 2017-12-22
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Publication No.: US10014347B2Publication Date: 2018-07-03
- Inventor: Jun Liu , Kunal R. Parekh
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John P.S.
- Main IPC: H01L27/24
- IPC: H01L27/24 ; H01L45/00

Abstract:
An array of memory cells includes buried access lines having conductively doped semiconductor material. Pillars extend elevationally outward of and are spaced along the buried access lines. The pillars individually include a memory cell. Outer access lines are elevationally outward of the pillars and the buried access lines. The outer access lines are of higher electrical conductivity than the buried access lines. A plurality of conductive vias is spaced along and electrically couple pairs of individual of the buried and outer access lines. A plurality of the pillars is between immediately adjacent of the vias along the pairs. Electrically conductive metal material is directly against tops of the buried access lines and extends between the pillars along the individual buried access lines. Other embodiments, including method, are disclosed.
Public/Granted literature
- US20180122859A1 Arrays Of Memory Cells And Methods Of Forming An Array Of Memory Cells Public/Granted day:2018-05-03
Information query
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