Invention Grant
- Patent Title: Controlling timing and edge transition of a delayed clock signal and data latching methods using such a delayed clock signal
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Application No.: US15084979Application Date: 2016-03-30
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Publication No.: US10019170B2Publication Date: 2018-07-10
- Inventor: Eric Lee , Qiang Tang , Ali Feiz Zarrin Ghalam , Hoon Choi , Daesik Song
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dicke, Billig & Czaja, PLLC
- Main IPC: G06F3/06
- IPC: G06F3/06 ; G11C16/26 ; G11C16/32 ; G06F12/0802 ; G11C7/10 ; G11C7/22
Abstract:
In an example, a method of operating a memory device to latch data for output from the memory device may include generating a first clock edge of a first clock signal in response to a first clock edge of a second clock signal, generating a second, opposite, clock edge of the first clock signal immediately following the first clock edge of the first clock signal in response to a second, opposite, clock edge of the second clock signal immediately following the first clock edge of the second clock signal, and latching the data in response to the second clock edge of the first clock signal for output from the memory device.
Public/Granted literature
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