Invention Grant
- Patent Title: Electronic package and fabrication method thereof and substrate structure
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Application No.: US14984256Application Date: 2015-12-30
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Publication No.: US10049973B2Publication Date: 2018-08-14
- Inventor: Ching-Wen Chiang , Kuang-Hsin Chen , Hsien-Wen Chen
- Applicant: Siliconware Precision Industries Co., Ltd.
- Applicant Address: TW Taichung
- Assignee: Siliconware Precision Industries Co., Ltd.
- Current Assignee: Siliconware Precision Industries Co., Ltd.
- Current Assignee Address: TW Taichung
- Agency: Mintz Levin Cohn Ferris Glovsky and Popeo, P.C.
- Agent Peter F. Corless; Steven M. Jensen
- Priority: TW104108424A 20150317
- Main IPC: H01L21/48
- IPC: H01L21/48 ; H01L23/498 ; H01L23/538 ; H01L21/683 ; H01L21/56 ; H01L23/31

Abstract:
A substrate structure is provided, which includes: a substrate body having opposite first and second surfaces; a plurality of conductive posts formed on the first surface of the substrate body and electrically connected to the substrate body; and a dielectric layer formed on the first surface of the substrate body for encapsulating the conductive posts, wherein one end surfaces of the conductive posts are exposed from the dielectric layer. Therefore, the present invention replaces the conventional silicon substrate with the dielectric layer so as to eliminate the need to fabricate the conventional TSVs (Through Silicon Vias) and thereby greatly reduce the fabrication cost. The present invention further provides an electronic package having the substrate structure and a fabrication method thereof.
Public/Granted literature
- US20160276256A1 ELECTRONIC PACKAGE AND FABRICATION METHOD THEREOF AND SUBSTRATE STRUCTURE Public/Granted day:2016-09-22
Information query
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