Invention Grant
- Patent Title: Clock and data recovery having shared clock generator
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Application No.: US15677467Application Date: 2017-08-15
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Publication No.: US10050771B2Publication Date: 2018-08-14
- Inventor: Masum Hossain , Brian Leibowitz , Jihong Ren
- Applicant: Rambus Inc.
- Applicant Address: US CA Sunnyvale
- Assignee: Rambus Inc.
- Current Assignee: Rambus Inc.
- Current Assignee Address: US CA Sunnyvale
- Main IPC: H04L7/00
- IPC: H04L7/00 ; H04L27/32 ; H04L27/00

Abstract:
This disclosure provides a clock recovery circuit for a multi-lane communication system. Local clocks are recovered from the input signals using respective local CDR circuits, and associated CDR error signals are aggregated or otherwise combined. A global recovered clock for shared use by the local CDR circuits is generated at a controllable oscillation frequency as a function of a combination of the error signals from the plurality of receivers. A voltage- or current-controlled delay line can also be used to phase adjust the global recovered clock to mitigate band-limited, lane-correlated, high frequency jitter.
Public/Granted literature
- US20180054293A1 Clock and Data Recovery Having Shared Clock Generator Public/Granted day:2018-02-22
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