Invention Grant
- Patent Title: Semiconductor device having a transistor and first and second embedded layers
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Application No.: US14712894Application Date: 2015-05-14
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Publication No.: US10062773B2Publication Date: 2018-08-28
- Inventor: Masaru Kadoshima , Masao Inoue
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: Shapiro, Gabor and Rosenberger, PLLC
- Priority: JP2014-107950 20140526
- Main IPC: H01L29/739
- IPC: H01L29/739 ; H01L29/10 ; H01L21/8238 ; H01L27/092

Abstract:
The present invention makes it possible, in a manufacturing process of a semiconductor device, to inhibit: impurities from diffusing from a substrate to a semiconductor layer; and the withstand voltage of a transistor from deteriorating.In the present invention, a first electrically conductive type epitaxial layer is formed over a first electrically conductive type base substrate. The impurity concentration of the epitaxial layer is lower than that of the base substrate. A second electrically conductive type first embedded layer and a second electrically conductive type second embedded layer are formed in the epitaxial layer. The second embedded layer is deeper than the first embedded layer, is kept away from the first embedded layer, and has an impurity concentration lower than the first embedded layer. A transistor is further formed in the epitaxial layer.
Public/Granted literature
- US20150340479A1 SEMICONDUCTOR DEVICE Public/Granted day:2015-11-26
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