A thin Ge layer is formed between an SiGe intrinsic base and single-crystal Si extrinsic base structures to greatly simplify the fabrication of raised-base SiGe heterojunction bipolar transistors (HBTs). The fabrication process includes sequentially depositing the SiGe intrinsic base, the Ge, and Si extrinsic base layers as single-crystal structures over a patterned silicon wafer while the wafer is maintained inside a reaction chamber. The Ge layer subsequently functions as an etch stop, and protects the crystallinity of the underlying SiGe intrinsic base material during subsequent dry etching of the Si extrinsic base layer, which is performed to generate an emitter window. A wet etch then removes residual Ge from the emitter window to expose a contact portion of the SiGe layer surface without damage. A polysilicon emitter structure is formed in the emitter window, and then salicide is formed over the base stacks to encapsulate the SiGe and Ge structures.