Invention Grant
- Patent Title: Memory device including memory circuit and selection circuit
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Application No.: US14479707Application Date: 2014-09-08
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Publication No.: US10090023B2Publication Date: 2018-10-02
- Inventor: Takuro Ohmaru , Kiyoshi Kato
- Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
- Applicant Address: JP Atsugi-shi, Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi-shi, Kanagawa-ken
- Agency: Fish & Richardson P.C.
- Priority: JP2013-187831 20130911; JP2014-018579 20140203; JP2014-070121 20140328
- Main IPC: G11C5/14
- IPC: G11C5/14 ; H01L27/12 ; G11C11/403

Abstract:
To provide a memory device with short overhead time and a semiconductor device including the memory device. A memory device includes a first circuit that can retain data and a second circuit by the supply of power supply voltage. The second circuit includes a third circuit that selects a first potential corresponding to the data or a second potential supplied to a first wiring; a first transistor having a channel formation region in an oxide semiconductor film; a capacitor that hold the first potential or the second potential that is selected by the third circuit and supplied through the first transistor; and a second transistor controlling a conduction state between the first circuit and a second wiring that can supply a third potential in accordance with the potential retained in the capacitor.
Public/Granted literature
- US20150070962A1 MEMORY DEVICE, SEMICONDUCTOR DEVICE, AND ELECTRONIC DEVICE Public/Granted day:2015-03-12
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