Invention Grant
- Patent Title: Enhanced substrate contact for MOS transistor in an SOI substrate, in particular an FDSOI substrate
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Application No.: US15230699Application Date: 2016-08-08
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Publication No.: US10096708B2Publication Date: 2018-10-09
- Inventor: Sotirios Athanasiou , Philippe Galy
- Applicant: STMicroelectronics SA
- Applicant Address: FR Montrouge
- Assignee: STMicroelectronics SA
- Current Assignee: STMicroelectronics SA
- Current Assignee Address: FR Montrouge
- Agency: Crowe & Dunlevy
- Priority: FR1652717 20160330
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L27/12 ; H01L23/528 ; H01L21/84 ; H01L29/66 ; H01L21/74 ; H01L29/786

Abstract:
An integrated electronic device includes a semiconductive film above a buried insulating layer that is situated above a supporting substrate. An active zone is delimited within the semiconductive film. A MOS transistor supported within the active zone includes a gate region situated above the active zone. The gate region includes a rectilinear part situated between source and drain regions. The gate region further includes a forked part extending from the rectilinear part. A raised semiconductive region situated above the active zone is positioned at least partly between portions of the forked part. A substrate contact for the transistor is electrically coupled to the raised semiconductive region.
Public/Granted literature
- US20170288059A1 ENHANCED SUBSTRATE CONTACT FOR MOS TRANSISTOR IN AN SOI SUBSTRATE, IN PARTICULAR AN FDSOI SUBSTRATE Public/Granted day:2017-10-05
Information query
IPC分类: