Invention Grant
- Patent Title: Power side-channel attack resistant advanced encryption standard accelerator processor
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Application No.: US15088823Application Date: 2016-04-01
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Publication No.: US10103873B2Publication Date: 2018-10-16
- Inventor: Raghavan Kumar , Sanu K. Mathew , Sudhir K. Satpathy , Vikram B. Suresh
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Lowenstein Sandler LLP
- Main IPC: G06F11/30
- IPC: G06F11/30 ; H04L9/00 ; H04L9/06 ; G06F12/14

Abstract:
A processing system includes a processing core and a hardware accelerator communicatively coupled to the processing core. The hardware accelerator includes a random number generator to generate a byte order indicator. The hardware accelerator also includes a first switching module communicatively coupled to the random value indicator generator. The switching module receives an byte sequence in an encryption round of the cryptographic operation and feeds a portion of the input byte sequence to one of a first substitute box (S-box) module or a second S-box module in view of a byte order indicator value generated by the random number generator.
Public/Granted literature
- US20170288855A1 POWER SIDE-CHANNEL ATTACK RESISTANT ADVANCED ENCRYPTION STANDARD ACCELERATOR PROCESSOR Public/Granted day:2017-10-05
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