Invention Grant
- Patent Title: Semiconductor device and manufacturing method thereof
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Application No.: US15386746Application Date: 2016-12-21
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Publication No.: US10109730B2Publication Date: 2018-10-23
- Inventor: Tatsuo Nakayama , Hironobu Miyamoto
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: Mattingly & Malur, PC
- Priority: JP2016-036825 20160229
- Main IPC: H01L21/04
- IPC: H01L21/04 ; H01L21/425 ; H01L29/778 ; H01L21/02 ; H01L21/265 ; H01L21/266 ; H01L29/06 ; H01L29/20 ; H01L29/423 ; H01L29/66 ; H01L29/40 ; H01L29/417 ; H01L29/10

Abstract:
A semiconductor device includes a codoped layer, a channel layer, a barrier layer, and a gate electrode disposed in a trench extending through the barrier layer and reaching a middle point in the channel layer via a gate insulating film. On both sides of the gate electrode, a source electrode and a drain electrode are formed. On the source electrode side, an n-type semiconductor region is disposed to fix a potential and achieve a charge removing effect while, on the drain electrode side, a p-type semiconductor region is disposed to improve a drain breakdown voltage. By introducing hydrogen into a region of the codoped layer containing Mg as a p-type impurity in an amount larger than that of Si as an n-type impurity where the n-type semiconductor region is to be formed, it is possible to inactivate Mg and provide the n-type semiconductor region.
Public/Granted literature
- US20170250274A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Public/Granted day:2017-08-31
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