Invention Grant
- Patent Title: Semiconductor device
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Application No.: US15721784Application Date: 2017-09-30
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Publication No.: US10163791B2Publication Date: 2018-12-25
- Inventor: Toshihiko Akiba , Shuuichi Kariyazaki
- Applicant: Renesas Electronics Corporation
- Applicant Address: unknown Tokyo
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: unknown Tokyo
- Agency: Shapiro, Gabor and Rosenberger, PLLC
- Priority: JP2016-236713 20161206
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L29/40 ; H01L23/528 ; H01L23/15 ; H01L23/00 ; H01L23/498 ; H01L25/065 ; H01L25/18

Abstract:
It is intended to reduce the price of a semiconductor device and increase the reliability thereof. In an interposer, a plurality of wiring layers are disposed between uppermost-layer wiring and lowermost-layer wiring. For example, a third wiring layer is electrically coupled directly to a first wiring layer as the uppermost-layer wiring by a long via wire extending through insulating layers without intervention of a second wiring layer. For example, an upper-surface terminal made of the first wiring layer is electrically coupled directly to a via land made of the third wiring layer by the long via wire. Between the adjacent long via wires, three lead-out wires made of the second wiring layer can be placed. The number of the lead-out wires that can be placed between the adjacent long via wires is larger than the number of the lead-out wires that can be placed between the adjacent via lands.
Public/Granted literature
- US20180158771A1 SEMICONDUCTOR DEVICE Public/Granted day:2018-06-07
Information query
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