Invention Grant
- Patent Title: Cache bypass
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Application No.: US15427409Application Date: 2017-02-08
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Publication No.: US10185663B2Publication Date: 2019-01-22
- Inventor: Jamshed Jalal , Michael Filippo , Bruce James Mathewson , Phanindra Kumar Mannava
- Applicant: ARM Limited
- Applicant Address: GB Cambridge
- Assignee: ARM Limited
- Current Assignee: ARM Limited
- Current Assignee Address: GB Cambridge
- Agency: Nixon & Vanderhye P.C.
- Main IPC: G06F12/08
- IPC: G06F12/08 ; G06F12/0888 ; G06F12/0811 ; G06F12/0862 ; G06F12/0831 ; G06F12/128

Abstract:
A data processing apparatus is provided including a memory hierarchy having a plurality of cache levels including a forwarding cache level, at least one bypassed cache level, and a receiver cache level. The forwarding cache level forwards a data access request relating to a given data value to the receiver cache level, inhibiting the at least one bypassed cache level from responding to the data access request. The receiver cache level includes presence determination circuitry for performing a determination as to whether the given data value is present in the at least one bypassed cache level. In response to the determination indicating that the data value is present in the at least one bypassed cache level, one of the at least one bypassed cache level is made to respond to the data access request.
Public/Granted literature
- US20180225219A1 CACHE BYPASS Public/Granted day:2018-08-09
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