Invention Grant
- Patent Title: Semiconductor device and manufacturing method of semiconductor device
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Application No.: US15841676Application Date: 2017-12-14
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Publication No.: US10199476B2Publication Date: 2019-02-05
- Inventor: Tatsuo Nakayama , Hironobu Miyamoto , Yasuhiro Okamoto
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Koutou-ku, Tokyo
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Koutou-ku, Tokyo
- Agency: Sughrue Mion, PLLC
- Priority: JP2017-012688 20170127
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/778 ; H01L29/205 ; H01L29/423 ; H01L29/10 ; H01L29/20 ; H01L29/40 ; H01L29/207

Abstract:
A mesa portion of a semiconductor device, which includes a channel base layer formed of a first nitride semiconductor layer, a channel layer formed of a second nitride semiconductor layer, a barrier layer formed of a third nitride semiconductor layer, a mesa-type fourth nitride semiconductor layer, a gate insulating film that covers the mesa portion, and a gate electrode formed over the gate insulating film, is used as a co-doped layer. The mesa portion is used as the co-doped layer, so that interface charges generated at an interface between the gate insulating film and the mesa portion can be cancelled by p-type impurity or n-type impurity in the co-doped layer and a threshold potential can be improved. Further, the fourth nitride semiconductor layer is n-type until the gate insulating film is formed, and the fourth nitride semiconductor layer is made neutral or p-type after the gate insulating film is formed.
Public/Granted literature
- US20180219089A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE Public/Granted day:2018-08-02
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