- Patent Title: Network allocation vector operations to reduce channel access delay
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Application No.: US15278449Application Date: 2016-09-28
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Publication No.: US10199720B2Publication Date: 2019-02-05
- Inventor: Ou Yang , Chittabrata Ghosh , Carlos Cordeiro , Solomon B. Trainin
- Applicant: Intel IP Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel IP Corporation
- Current Assignee: Intel IP Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: H04W84/12
- IPC: H04W84/12 ; H01Q1/24 ; H04W72/08 ; H04B7/04 ; H04W16/28

Abstract:
Computing readable media, apparatuses, and methods for network allocation vector operations to reduce channel access delay. An apparatus of a wireless device is disclosed. The apparatus comprising processing circuitry configure to: select a first one or more directional multi-gigabit (DMG) antennas from DMG antennas of the wireless device. The processing circuitry further configured to configure the wireless device to perform a clear channel assessment (CCA) for each of a plurality of CCA configurations applicable to the first one or more DMG antennas, where each CCA configuration comprises a second one or more of the DMG antennas. The processing circuitry further configured to if each CCA configuration applicable to the first one or more DMG antennas indicate the channel is idle, decrease a backoff time, and, if the backoff time is zero, configure the wireless device to transmit a packet on the channel using the first one or more DMG antennas.
Public/Granted literature
- US20170302510A1 NETWORK ALLOCATION VECTOR OPERATIONS TO REDUCE CHANNEL ACCESS DELAY Public/Granted day:2017-10-19
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