The present disclosure provides an array substrate, including: a base substrate, a plurality of scan lines; a plurality of data lines arranged by intersecting with the plurality of scan lines; a plurality of thin film transistors arranged in a matrix, each thin film transistor includes a gate electrode, an active layer and a drain electrode; a planarization layer covering the gate electrode, the active layer and the drain electrode, a position of the planarization layer corresponding to the drain electrode is provided with a through hole penetrating through the planarization layer, and the drain electrode is located in the through hole; a filling electrode, located in the through hole and connected with the drain electrode and covers the drain electrode; and a pixel electrode, indirectly connected with the drain electrode through the filling electrode.