- 专利标题: Semiconductor device and manufacturing method therefor
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申请号: US15298958申请日: 2016-10-20
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公开(公告)号: US10229989B2公开(公告)日: 2019-03-12
- 发明人: Hitoshi Matsuura
- 申请人: Renesas Electronics Corporation
- 申请人地址: JP Koutou-ku, Tokyo
- 专利权人: Renesas Electronics Corporation
- 当前专利权人: Renesas Electronics Corporation
- 当前专利权人地址: JP Koutou-ku, Tokyo
- 代理机构: Sughrue Mion, PLLC
- 优先权: JP2015-207889 20151022
- 主分类号: H01L29/739
- IPC分类号: H01L29/739 ; H01L29/06 ; H01L29/423 ; H01L29/49 ; H01L29/66 ; H01L29/10
摘要:
A semiconductor device includes a trench-gate IGBT enabling the fine adjustment of a gate capacitance independent from cell performance. In a gate wiring lead-out region, a plurality of trenches is arranged spaced apart from each other in an X direction perpendicular to a Y direction. Each trench has a shape enclosed by a rectangular outer outline and a rectangular inner outline in plan view. A trench gate electrode is provided in each of the trenches so as to be electrically coupled to an extraction electrode. To obtain an adequate breakdown voltage between a collector and an emitter, the trenches are formed in a p-type floating region. An n−-type drift region is formed in a region located inside an inner outline of the trench in plan view, whereby a capacitance formed between the trench gate electrode and the n−-type drift region is used as the reverse transfer capacitance.
公开/授权文献
- US10304949B2 Semiconductor device and manufacturing method therefor 公开/授权日:2019-05-28
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