Invention Grant
- Patent Title: Bipolar transistor, semiconductor device, and bipolar transistor manufacturing method
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Application No.: US15454434Application Date: 2017-03-09
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Publication No.: US10236237B2Publication Date: 2019-03-19
- Inventor: Kenji Sasaki
- Applicant: Murata Manufacturing Co., Ltd.
- Applicant Address: JP Kyoto
- Assignee: MURATA MANUFACTURING CO., LTD.
- Current Assignee: MURATA MANUFACTURING CO., LTD.
- Current Assignee Address: JP Kyoto
- Agency: Pearne & Gordon LLP
- Priority: JP2013-159358 20130731
- Main IPC: H01L23/482
- IPC: H01L23/482 ; H01L23/535 ; H01L27/082 ; H01L29/66 ; H01L29/737 ; H01L29/06 ; H01L29/08 ; H01L29/205 ; H01L23/66 ; H01L25/065 ; H01L27/06 ; H01L25/16 ; H01L21/306 ; H01L29/04 ; H01L29/10

Abstract:
Disconnection of a base line is suppressed even when a short-side direction of a collector layer is parallel to crystal orientation [011]. A bipolar transistor includes: a collector layer that has a long-side direction and a short-side direction in a plan view, in which the short-side direction is parallel to crystal orientation [011], a cross-section perpendicular to the short-side direction has an inverted mesa shape, and a cross-section perpendicular to the long-side direction has a forward mesa shape; a base layer that is formed on the collector layer; a base electrode that is formed on the base layer; and a base line that is connected to the base electrode and that is drawn out from an end in the short-side direction of the collector layer to the outside of the collector layer in a plan view.
Public/Granted literature
- US20170186671A1 BIPOLAR TRANSISTOR, SEMICONDUCTOR DEVICE, AND BIPOLAR TRANSISTOR MANUFACTURING METHOD Public/Granted day:2017-06-29
Information query
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