- 专利标题： Semiconductor integrated circuit apparatus and manufacturing method for same
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申请号： US15595306申请日： 2017-05-15
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公开(公告)号： US10236286B2公开(公告)日： 2019-03-19
- 发明人: Katsuyoshi Matsuura , Junichi Ariyoshi
- 申请人： MIE FUJITSU SEMICONDUCTOR LIMITED
- 申请人地址： JP Kuwana-shi
- 专利权人： MIE FUJITSU SEMICONDUCTOR LIMITED
- 当前专利权人： MIE FUJITSU SEMICONDUCTOR LIMITED
- 当前专利权人地址： JP Kuwana-shi
- 代理机构： Westerman, Hattori, Daniels & Adrian, LLP
- 优先权： JP2014-003914 20140114
- 主分类号： H01L27/02
- IPC分类号： H01L27/02 ; H01L21/8234 ; H01L21/8238 ; H01L27/07 ; H01L27/06 ; H01L27/11517 ; H01L21/265 ; H01L29/66 ; H01L29/78
摘要：
A semiconductor integrated circuit apparatus and a manufacturing method for the same are provided in such a manner that a leak current caused by a ballast resistor is reduced, and at the same time, the inconsistency in the leak current is reduced. The peak impurity concentration of the ballast resistors is made smaller than the peak impurity concentration in the extension regions, and the depth of the ballast resistors is made greater than the depth of the extension regions.
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