Invention Grant
- Patent Title: Forward error correction (FEC) emulator
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Application No.: US15981844Application Date: 2018-05-16
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Publication No.: US10236907B2Publication Date: 2019-03-19
- Inventor: Andre Szczepanek , Arash Farhoodfar , Sudeep Bhoja , Sean Batty , Shaun Lytollis
- Applicant: INPHI CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: INPHI CORPORATION
- Current Assignee: INPHI CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Ogawa P.C.
- Agent Richard T. Ogawa
- Main IPC: H03M13/01
- IPC: H03M13/01 ; H03M13/15

Abstract:
Embodiments relate to the emulation of the effect of Forward Error Correction (FEC) codes, e.g., GF10 Reed Solomon (RS) FEC codes, on the bit error ratio (BER) of received Pseudo-Random Binary Sequences (PRBS) patterns. In particular, embodiments group errors into RS-FEC symbols and codewords in order to determine if the errors are correctable. By emulating the error correction capabilities of FEC codes in order to determine which errors are correctable by the code, embodiments afford a more accurate representation of the post-FEC BER of RS FEC codes from links carrying PRBS patterns. This FEC code emulation provides error correction statistics, for stand-alone use or for error correction in connection with Bit Error Rate Testers (BERTs).
Public/Granted literature
- US20180262209A1 FORWARD ERROR CORRECTION (FEC) EMULATOR Public/Granted day:2018-09-13
Information query
IPC分类: