Invention Grant
- Patent Title: Semiconductor device and method of manufacturing the semiconductor device
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Application No.: US15604848Application Date: 2017-05-25
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Publication No.: US10249715B2Publication Date: 2019-04-02
- Inventor: Hironobu Miyamoto , Tatsuo Nakayama , Atsushi Tsuboi , Yasuhiro Okamoto , Hiroshi Kawaguchi
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Koutou-ku, Tokyo
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Koutou-ku, Tokyo
- Agency: Sughrue Mion, PLLC
- Priority: JP2016-145268 20160725
- Main IPC: H01L29/10
- IPC: H01L29/10 ; H01L23/522 ; H01L23/528 ; H01L29/20 ; H01L29/205 ; H01L29/423 ; H01L29/66 ; H01L29/778 ; H01L29/417 ; H01L29/45

Abstract:
Properties of a semiconductor device are improved. A semiconductor device is configured so as to include a voltage clamp layer, a channel underlayer, a channel layer, and a barrier layer, which are formed in order above a substrate, a trench that extends up to the middle of the channel layer while penetrating through the barrier layer, a gate electrode disposed within the trench with a gate insulating film in between, a source electrode and a drain electrode formed above the barrier layer on both sides of the gate electrode, and a fourth electrode electrically coupled to the voltage clamp layer. The fourth electrode is electrically isolated from the source electrode, and a voltage applied to the fourth electrode is different from a voltage applied to the source electrode. Consequently, threshold control can be performed. For example, a threshold of a MISFET can be increased.
Public/Granted literature
- US20180026099A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE Public/Granted day:2018-01-25
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