Invention Grant
- Patent Title: Method for manufacturing a Si-based high-mobility CMOS device with stacked channel layers, and resulting devices
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Application No.: US15825826Application Date: 2017-11-29
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Publication No.: US10256157B2Publication Date: 2019-04-09
- Inventor: Clement Merckling , Guillaume Boccardi
- Applicant: IMEC VZW
- Applicant Address: BE Leuven
- Assignee: IMEC VZW
- Current Assignee: IMEC VZW
- Current Assignee Address: BE Leuven
- Agency: McDonnell Boehnen Hulbert & Berghoff LLP
- Priority: EP15202174 20151222
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L27/06 ; H01L29/06 ; H01L29/66 ; H01L27/092 ; H01L29/423 ; H01L29/786 ; H01L21/8238 ; H01L21/8258

Abstract:
A device and method for manufacturing a Si-based high-mobility CMOS device is provided. The method includes the steps of: (i) providing a silicon substrate having a first insulation layer on top and a trench into the silicon; (ii) manufacturing a III-V semiconductor channel layer above the first insulation layer by depositing a first dummy layer of a sacrificial material, covering the first dummy layer with a first oxide layer, and replacing the first dummy layer with III-V semiconductor material by etching via holes in the first oxide layer followed by selective area growth; (iii) manufacturing a second insulation layer above the III-V semiconductor channel layer and uncovering the trench; (iv) manufacturing a germanium or silicon-germanium channel layer above the second insulation layer by depositing a second dummy layer of a sacrificial material, covering the second dummy layer with a second oxide layer, and replacing the second dummy layer with germanium or silicon-germanium by etching via holes in the second oxide layer followed by selective area growth.
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