Invention Grant
- Patent Title: Multi-level class D amplifier
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Application No.: US15730410Application Date: 2017-10-11
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Publication No.: US10256779B2Publication Date: 2019-04-09
- Inventor: Sudhir Polarouthu , Jasjot Singh Chadha , Rejin Raveendranath Kanjavalappil
- Applicant: TEXAS INSTRUMENTS INCORPORATED
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent John R. Pessetto; Charles A. Brill; Frank D. Cimino
- Priority: IN201641042893 20161216
- Main IPC: H03F3/217
- IPC: H03F3/217 ; H03F3/45 ; H03F1/02 ; H03F3/183

Abstract:
An amplifier includes a first transistor coupled to a first voltage source node and a second transistor coupled to a second voltage source node. The first and second transistors also couple together at an intermediate node. The amplifier further includes a third transistor coupled to the intermediate node and a fourth transistor coupled to the third transistor at a positive output node of the amplifier. Further, the amplifier includes a fifth transistor coupled to the intermediate node and a sixth transistor coupled to the fifth transistor at a negative output node of the amplifier.
Public/Granted literature
- US20180175812A1 MULTI-LEVEL CLASS D AMPLIFIER Public/Granted day:2018-06-21
Information query
IPC分类: