This application relates to time-encoding modulators (301,700) having a self-oscillating modulator module configured to receive an input signal and output a pulse-width modulated signal (SPWM) where the pulse-width modulated signal is synchronized to a first clock signal (CLK1). A hysteretic comparator module (302) located in a feedforward path is configured to generate the time encoded signal (SPWM) at a first node (304) based on the input signal (SIN) and a feedback signal (SFB). A feedback path is coupled to the first node to provide the feedback signal, which is either applied to an input of the hysteretic comparator module via a loop filter (701) in the feedback path or applied to the feedforward path prior to a loop filter (202) upstream of the hysteretic comparator module (302). The hysteretic comparator module (302) is configured such that any change in state of the time encoded signal at the first node is synchronized to the first clock signal (CLK1).