Invention Grant
- Patent Title: Semiconductor packages including stacked chips
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Application No.: US15829260Application Date: 2017-12-01
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Publication No.: US10262972B2Publication Date: 2019-04-16
- Inventor: Seung Yeop Lee , Jin Kyoung Park
- Applicant: SK hynix Inc.
- Applicant Address: KR Icheon-si, Gyeonggi-do
- Assignee: SK hynix Inc.
- Current Assignee: SK hynix Inc.
- Current Assignee Address: KR Icheon-si, Gyeonggi-do
- Agency: William Park & Associates Ltd.
- Priority: KR10-2017-0064821 20170525
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H01L25/18 ; H01L23/00
Abstract:
A semiconductor package may include a first chip stack including first chips which are stacked on a package substrate. The semiconductor package may include a second chip stack including second chips which are stacked on the package substrate. The semiconductor package may include a third chip disposed on the first and second chip stacks.
Public/Granted literature
- US20180342481A1 SEMICONDUCTOR PACKAGES INCLUDING STACKED CHIPS Public/Granted day:2018-11-29
Information query
IPC分类:
