- 专利标题: Memory and logic device and method for manufacturing the same
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申请号: US13852917申请日: 2013-03-28
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公开(公告)号: US10263066B2公开(公告)日: 2019-04-16
- 发明人: Masayuki Hiroi , Takashi Sakoh
- 申请人: Renesas Electronics Corporation
- 申请人地址: JP Tokyo
- 专利权人: RENESAS ELECTRONICS CORPORATION
- 当前专利权人: RENESAS ELECTRONICS CORPORATION
- 当前专利权人地址: JP Tokyo
- 代理机构: McGinn I.P. Law Group, PLLC
- 优先权: JP2012-099630 20120425
- 主分类号: H01L49/02
- IPC分类号: H01L49/02 ; H01L27/108 ; H01L27/02 ; H01L23/532 ; H01L23/00
摘要:
The present invention is directed to a semiconductor integrated circuit device that basically has a non-memory array area, a memory array area, and memory capacitors formed across lower embedded metal interconnection layers including a low-dielectric constant interlayer insulating film in the memory array area. In addition, a memory-periphery metal seal ring is provided in the lower embedded metal interconnection layers having at least the low-dielectric constant interlayer insulating film so as to surround the memory array area.
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