-
公开(公告)号:US10263066B2
公开(公告)日:2019-04-16
申请号:US13852917
申请日:2013-03-28
发明人: Masayuki Hiroi , Takashi Sakoh
IPC分类号: H01L49/02 , H01L27/108 , H01L27/02 , H01L23/532 , H01L23/00
摘要: The present invention is directed to a semiconductor integrated circuit device that basically has a non-memory array area, a memory array area, and memory capacitors formed across lower embedded metal interconnection layers including a low-dielectric constant interlayer insulating film in the memory array area. In addition, a memory-periphery metal seal ring is provided in the lower embedded metal interconnection layers having at least the low-dielectric constant interlayer insulating film so as to surround the memory array area.