Invention Grant
- Patent Title: Method and apparatus for reducing TLB shootdown overheads in accelerator-based systems
-
Application No.: US15191462Application Date: 2016-06-23
-
Publication No.: US10282308B2Publication Date: 2019-05-07
- Inventor: Nuwan Jayasena , Andrew G. Kegel
- Applicant: Advanced Micro Devices, Inc.
- Applicant Address: US CA Sunnyvale
- Assignee: Advanced Micro Devices, Inc.
- Current Assignee: Advanced Micro Devices, Inc.
- Current Assignee Address: US CA Sunnyvale
- Agency: Volpe and Koenig, P.C.
- Main IPC: G06F12/10
- IPC: G06F12/10 ; G06F12/1027 ; G06F12/1009
Abstract:
A method and apparatus for reducing TLB shootdown operation overheads in accelerator-based computing systems is described. The disclosed method and apparatus may also be used in the areas of near-memory and in-memory computing, where near-memory or in-memory compute units may need to share a host CPU's virtual address space. Metadata is associated with page table entries (PTEs) and mechanisms use the metadata to limit the number of processing elements that participate in a TLB shootdown operation.
Public/Granted literature
- US20170371805A1 METHOD AND APPARATUS FOR REDUCING TLB SHOOTDOWN OVERHEADS IN ACCELERATOR-BASED SYSTEMS Public/Granted day:2017-12-28
Information query
