An image processing apparatus includes a plurality of memories and a hardware processor which controls an execution operation of a first function including an image processing function and an execution operation of a second function including a server function, by using the plurality of memories. The hardware processor estimates a required bandwidth which is a memory bandwidth required for the execution operation of the first function on the basis of a current operation mode of the image processing apparatus among a plurality of operation modes of the image processing apparatus, and determines a bandwidth securing channel for first function which is a channel capable of being used for the execution operation of the first function and incapable of being used for the execution operation of the second function, out of a plurality of channels used to access the plurality of memories, on the basis of the required bandwidth.