Invention Grant
- Patent Title: 3D IC semiconductor device and structure with stacked memory
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Application No.: US15803732Application Date: 2017-11-03
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Publication No.: US10290682B2Publication Date: 2019-05-14
- Inventor: Deepak C. Sekar , Zvi Or-Bach
- Applicant: Monolithic 3D Inc.
- Applicant Address: US CA San Jose
- Assignee: MONOLITHIC 3D INC.
- Current Assignee: MONOLITHIC 3D INC.
- Current Assignee Address: US CA San Jose
- Agency: Tran & Associates
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L47/00 ; H01L27/24 ; H01L27/108 ; H01L29/78 ; H01L27/12 ; H01L27/11578 ; H01L27/11551 ; H01L27/11529 ; H01L27/11 ; H01L27/06 ; H01L21/84 ; H01L21/822 ; H01L21/762 ; H01L21/683 ; H01L21/268 ; H01L27/22 ; H01L29/423 ; H01L45/00 ; H01L27/11573 ; H01L27/11526 ; H01L27/105

Abstract:
A 3D semiconductor device, the device including: first transistors; second transistors, overlaying the first transistors; third transistors, overlaying the second transistors; and fourth transistors, overlaying the third transistors, where the second transistors, the third transistors and the fourth transistors are self-aligned, being processed following the same lithography step, and where at least one of the first transistors is part of a control circuit controlling at least one of the second transistors, at least one of the third transistors and at least one of the fourth transistors.
Public/Granted literature
- US20180069052A1 SEMICONDUCTOR DEVICE AND STRUCTURE Public/Granted day:2018-03-08
Information query
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