Clock synchronization method, receiver, transmitter, and clock synchronization system
Abstract:
A clock synchronization method, a receiver, a transmitter, and a clock synchronization system, where the method includes obtaining a common reference clock signal, determining Bt according to the common reference clock signal and Mrd(t−1), where B t = mod ⁢ [ ∑ n = 0 t - 1 ⁢ ⁢ Mr d ⁡ ( n ) , 2 p ] , determining that Mrd(t−1) is a target Mrd when Ct obtained by means of calculation according to Mrd(t−1) is less than or equal to a threshold, where Ct=Bt−At, At is included in a residual time stamp (RTS) packet received by a receiver last time from the transmitter, and A t = mod ⁢ [ ∑ n = 0 t ⁢ ⁢ M d ⁡ ( n ) , 2 p ] , performing frequency division on the common reference clock signal using the target Mrd as a frequency dividing coefficient to obtain a first clock signal, and performing frequency multiplication processing on the first clock signal to obtain a service clock signal. Hence, random phase offset may be avoided.
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